What is FreeCores

FreeCores is the collection of VHDL (and in the future Verilog) cores I developed. They are free of charge and licensed under GNU General Public License (GPL)

These cores are now available from OpenCores. This is an organization which tries to keep the free IP core developer community in one group and develop a GNU like licensing scheme for such products.

Cores currently available

• Monitor controller
• Wishbone Toolkit

Future plans

• An improved version of the monitor controller
• Cached SDRAM controller with burst support
• Small ARM compatible core
• Any wishes, ideas?